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How Big is a 3-Nanometre Node?

By Ekaterina Kaliteevskaya
How Big is a 3-Nanometre Node?

In semiconductor technology, the term “node” is used to refer to the size of the smallest feature of a transistor.

Transistors are semiconductor devices which are at the heart of every computer chip. Each transistor has a source, a gate and a drain, which enable the transistor to act as a tiny switch. In simple terms, when the gate is “open”, electric current can flow from the source to the drain. When the gate is “closed”, no current can flow from the source to the drain. When combined in specific configurations, transistors can perform logical operations such as AND, OR, NOT and others, forming the foundation of binary code used in classical computing.

As technology progresses, semiconductor manufacturers aim to transition to smaller nodes, enabling production of computer chips with smaller, more power-efficient components, as they continuously pursue the principles outlined in Moore’s law. Originating from an observation made by Gordon Moore, the co-founder of Intel, Moore’s law posits that the number of transistors in a given space doubles every two years. Since its inception in 1965, this “law” has consistently driven the semiconductor industry to meet the performance goal it established.

One factor which limits the transistor density is the size of the transistor gate, i.e. the separation between the source and the drain. A smaller gate allows more transistors to be packed on a chip, leading to increased transistor density, and thus increased computational power.

In the 1970s, it was possible to manufacture a gate size of approximately 10 µm. In 2003-2005, semiconductor manufacturers commercialised transistors made using the 90-nm process. In 2023, Apple announced that it would be launching computer chips made using 3-nanometre process technology, and leading semiconductor manufacturers expect to start work on 2-nanometre and 1-nanometre nodes in the near future. Does this mean that semiconductor manufacturers are able to produce transistors having a gate length which is only a few nanometres in length?

A transistor having a feature size of 1 nm would be truly mind-boggling, as this is the width across just 5 silicon atoms. The nanometre realm brings with it phenomena such as quantum tunnelling, which occurs when electrons, due to their wave-like nature, can “tunnel” through barriers that would be considered insurmountable at larger scales. This unexpected behaviour of electrons could make it challenging to control the flow of electrons, which would be problematic for a device whose purpose it is to precisely control electron flow.

So how can a node be only 3 nm in size?

The term “node” began to lose its meaning when decreasing the gate size became increasingly complicated and started to have a negative impact on the performance of the transistor.

At the beginning of the 2010s, the semiconductor industry focused their attention on commercialising transistors having a different architecture. Instead of focusing on decreasing the gate length of planar transistors (for example, the gate length of MOSFET transistors), more elaborate three-dimensional configurations have been introduced (such as the Fin-FET transistor). These more elaborate designs allowed for transistor density to be increased, without scaling down the size of each individual transistor. The term “node” (or “technology node”) is now used to refer to a new generation of semiconductor manufacturing, which increases the transistor density.

So, while we don’t know how exactly the 3-nanometre process works, it is not likely that “3-nanometre” refers to the size of any feature of the chip.

The International Roadmap for Devices and Systems (IRDS™) 2023 Update published by IEEE Standards Association Industry Connection indicates that the 3-nm technology node has a gate pitch of 48 nm. The IRDS is devised for technology assessment only and is without regard to any commercial consideration pertaining to individual products or equipment, but it gives a flavour of the size of transistors that hide in our computers today.

Thus, computer chips made with the 3-nanometre process contain nodes that are probably a lot bigger than 3 nm. Nevertheless, each leap in transistor density is an impressive feat, propelling us to the development of smaller more efficient, smaller and faster electronic devices.

In addition to incredible scientific achievements, the semiconductor industry is a geopolitical arena where nations invest heavily to drive innovation. Recent legislative initiatives from 2022-2023 underscore this commitment, with the US CHIPS and Science Act, EU Chips Act, and the UK Semiconductor Infrastructure Initiative allocating substantial funds to boost domestic research, development, and manufacturing. This, in addition to the semiconductor market's projected growth to almost USD 1.3 billion by 2032, signals both opportunity and complexity. In this dynamic landscape, careful consideration of IP strategy becomes imperative. A 19.9% increase in semiconductor patent filings was reported for 2022 by the European Patent Office and further emphasizes the growing emphasis on innovation and protection within the sector.

For tailored advice and guidance on semiconductor patent applications, our experienced professionals at J A Kemp are always ready to assist.